What Is Semi Additive Process (SAP)?
Semi additive process (SAP) represents a fundamental shift in how copper circuit traces are formed on printed circuit boards. Unlike traditional subtractive processes that begin with copper-clad laminate and remove unwanted copper through chemical etching, SAP builds traces by selectively plating copper where the circuit needs to exist.
The SAP process begins with bare dielectric substrate onto which a very thin electroless copper seed layer is applied. This seed layer is extremely thin—typically less than 1μm thick, with some implementations like Averatek’s A-SAP process using just 0.2μm of copper. A photoresist is then applied and imaged, leaving openings where traces are required. Copper is electroplated only in these openings to build up the full trace thickness. After stripping the photoresist, a brief flash etch removes the thin seed layer between traces, leaving the final circuit pattern.
This approach addresses a critical limitation of subtractive processing: etch undercut. When chemical etchant removes copper from a solid foil, it attacks sideways as well as downward, creating trapezoidal trace cross-sections that limit minimum feature sizes to approximately 25-30μm. By building traces up from a seed layer rather than removing material, SAP virtually eliminates undercut, enabling feature sizes of 15μm or less, with advanced implementations achieving 5-10μm traces.
SAP vs Other PCB Fabrication Processes
Understanding SAP requires comparing it against the full spectrum of PCB trace formation methods. Each approach offers different capabilities, costs, and manufacturing requirements.
Subtractive Process
The traditional standard in PCB manufacturing, subtractive processing begins with copper-clad laminate typically 18-35μm thick. The circuit pattern is imaged and unwanted copper is etched away, leaving the traces. This method is well-understood, cost-effective, and widely available. However, isotropic etching creates trapezoidal trace profiles due to undercut, limiting minimum line/space to approximately 25-30μm. For many applications, subtractive processing remains the most economical choice.
Modified Semi Additive Process (mSAP)
mSAP serves as a practical middle ground between subtractive and full SAP. It begins with an ultra-thin copper foil typically 1.5-3μm thick—significantly thinner than standard copper-clad but thicker than SAP’s seed layer. The process follows SAP’s sequence: image, pattern-plate, strip, and flash-etch. Because the starting foil is only a few microns thick, the flash etch removes almost nothing from the tall plated traces, resulting in near-vertical sidewalls.
mSAP achieves 15-30μm line/space capability, finer than subtractive but more manufacturable than true SAP. Critically, mSAP can run on adapted standard PCB production lines, which is why it became the technology that enabled Apple’s substrate-like PCBs in 2017 and remains widely used in smartphone manufacturing today.
Semi Additive Process (SAP)
True SAP begins with an electroless copper seed layer under 1μm thick, roughly ten times thinner than mSAP’s starting foil. This minimal seed means the flash etch removes almost nothing from the plated traces, producing truly vertical sidewalls and enabling sub-15μm feature sizes—down to approximately 5μm in production. However, SAP requires substrate-grade manufacturing lines with cleaner processing environments, limiting it to specialized fabricators and applications requiring extreme miniaturization.

Comparison Table
| Process | Starting Copper | Line/Space Capability | Trace Profile | Equipment |
|---|---|---|---|---|
| Subtractive | 18-35μm foil | ~25-30μm | Trapezoidal | Standard PCB lines |
| mSAP | 1.5-3μm foil | 15-30μm | Near-vertical | Adapted standard lines |
| SAP | <1μm seed | Below 15μm, to 5μm | Vertical | Substrate-grade lines |
Semi Additive Process Flow
The SAP manufacturing sequence follows a defined series of steps that distinguish it from subtractive processing.
Step 1: Seed Layer Deposition — The process begins with bare dielectric substrate. An extremely thin electroless copper seed layer, typically under 1μm, is applied directly to the dielectric surface. This seed provides a conductive foundation for subsequent electroplating.
Step 2: Photoresist Application and Imaging — Dry film photoresist is laminated onto the seed-coated surface. The circuit pattern is imaged using photolithography, with trace areas exposed and remaining areas protected by the resist.
Step 3: Pattern Plating — Copper is electroplated only in the areas where traces are required—the openings in the photoresist. This additive step builds traces up from the seed layer rather than removing material from a foil.
Step 4: Photoresist Strip — The dry film is removed, leaving the plated copper traces standing on the thin seed layer with gaps between them.
Step 5: Flash Etch — A brief differential etch removes the thin seed layer between the traces. Because this seed is only microns thick, the etch barely affects the tall plated traces, preserving trace geometry.
mSAP follows the identical sequence but begins with a thin laminated foil rather than bare dielectric, making it more compatible with standard PCB manufacturing infrastructure.

Benefits of Semi Additive Process
SAP delivers several advantages beyond simply achieving finer features.
Near-Vertical Trace Sidewalls — By building traces up rather than etching down, SAP produces rectangular cross-sections with vertical sidewalls. This geometry provides superior impedance control compared to trapezoidal subtractive traces, reducing signal loss in high-frequency applications.
Improved Signal Integrity — The consistent rectangular profile holds controlled impedance more tightly across the board. Additionally, vertical sidewalls reduce parasitic capacitance compared to trapezoidal traces, benefiting high-speed and RF/microwave circuits.
Design Density Gains — Additive processes can pack approximately three times the routing density of subtractive processing in the same area. This enables footprint reduction, layer count reduction, or additional functionality in the same board space.
Reduced Short Circuit Risk — The vertical sidewalls of SAP traces eliminate the under-cut geometry that creates potential short circuits between closely spaced traces. Even as spacing decreases, the risk of signal interference remains controlled.
Applications Requiring SAP
SAP technology serves applications where miniaturization demands exceed what subtractive or even mSAP processes can achieve.
IC Packaging Substrates — Integrated circuit packaging increasingly uses substrate-like PCBs that bridge the gap between traditional PCBs and semiconductor fabrication. SAP enables the sub-15μm features required for high-bandwidth memory interfaces, advanced processors, and heterogeneous integration applications.
Advanced Packaging — Technologies like 2.5D and 3D interposers, fan-out wafer-level packaging (FOWLP), and chip-on-wafer-on-substrate (CoWoS) rely on SAP’s fine-line capability to create the dense interconnection networks these packages require.
AI and High-Performance Computing — The computational demands of artificial intelligence and HPC require increasingly dense chip-to-chip interconnections. SAP enables the ultra-fine routing that supports high-bandwidth memory (HBM) integration and multi-chip modules.
RF and Microwave Circuits — The superior impedance control and near-vertical trace profiles of SAP benefit high-frequency applications. The rectangular cross-section reduces loss and provides consistent characteristic impedance, essential for 5G, radar, and satellite communications.
Medical Devices — Miniaturization in medical electronics—implantables, diagnostics, and wearables—drives adoption of SAP for space-constrained designs requiring maximum functionality.

Modified Semi Additive Process (MSAP) Evolution
The development of mSAP represented a practical evolution that made fine-line PCB technology accessible to mainstream manufacturing.
mSAP reduces the starting copper thickness from the 18-35μm of standard copper-clad to approximately 1.5-3μm. This thin foil remains compatible with standard PCB imaging and handling equipment while enabling the flash-etch differential that produces near-vertical traces.
The technology became commercially significant when Apple adopted substrate-like PCB technology for iPhone mainboards in 2017, demonstrating that mSAP could scale to high-volume consumer electronics production. Today, mSAP is standard in smartphones, enabling the dense routing required for application processors, baseband processors, and memory integration in devices where board space is extremely constrained.
GS Swiss PCB achieved a notable milestone in spring 2024 by commencing serial production of flexible PCBs using true SAP technology, demonstrating that sub-10μm features can be achieved in flexible circuit applications as well as rigid substrates.
Design Considerations for SAP
Designing for SAP fabrication requires understanding the technology’s capabilities and constraints.
Feature Size Requirements — Determine the minimum line/space your design requires. Sub-15μm needs true SAP; 15-30μm can use mSAP; above 30μm, subtractive processing is more economical.
Impedance Control — SAP’s rectangular trace profile behaves differently from subtractive trapezoids in impedance models. Ensure your simulation tools account for the correct cross-section, and communicate impedance targets clearly to your fabricator.
Material Selection — Low-loss materials become more important at fine line widths where signal integrity margins shrink. High-frequency applications particularly benefit from premium dielectrics.
Fabricator Capability Confirmation — Not all PCB manufacturers offer SAP or mSAP capability. Confirm your fab’s line/space limits, IPC class capability, and experience with fine-line processing before finalizing your design.
Panel Size Limitations — Substrate-grade manufacturing lines often use smaller panel sizes than standard PCB production. Factor this into your panelization and cost estimates.
When to Choose SAP vs Standard HDI
The decision between SAP, mSAP, and standard subtractive processing depends on your specific requirements.
Choose SAP when: Your design requires trace widths below 15μm, you need IC substrate-level feature densities, superior signal integrity is critical (especially for high-speed or RF applications), or you’re designing for advanced packaging technologies like 2.5D/3D interposers.
Choose mSAP when: You need finer features than subtractive provides but don’t require true sub-15μm capability, you want better impedance control than subtractive offers, or you’re targeting high-volume applications where mSAP’s manufacturing practicality provides cost advantages.
Choose subtractive processing when: Your minimum line/space is above approximately 30-40μm, cost is the primary consideration, or your design doesn’t require the signal integrity benefits of fine-line processing.
Cost and Capability Trade-offs
SAP technology carries higher costs than subtractive processing due to additional process steps, longer plating times, and more specialized equipment requirements.
mSAP offers a more accessible cost point than true SAP because it can run on adapted standard PCB lines. The technology gained widespread adoption precisely because it provides meaningful capability improvements at manageable cost increases.
The honest trade-off: additive processing adds process complexity and expense but delivers density, signal integrity, and miniaturization benefits that justify the cost for designs that genuinely need them. Specifying SAP or mSAP for a coarse design that subtractive processing could handle simply wastes money.
Frequently Asked Questions
What is semi additive process (SAP) in PCB manufacturing?
Semi additive process (SAP) is a PCB fabrication technique that builds circuit traces by selectively plating copper onto a seed layer rather than etching away unwanted copper from a solid foil. The process uses a very thin electroless copper seed (typically under 1μm) applied to the dielectric, followed by photoresist imaging, electroplating, resist stripping, and flash etching to remove the seed between traces. This approach achieves trace widths below 15μm—far finer than the 25-30μm limitation of traditional subtractive etching.
What is the difference between SAP and mSAP?
The key difference lies in the starting copper thickness. SAP uses an electroless copper seed layer under 1μm thick, enabling sub-15μm feature sizes down to approximately 5μm. mSAP (Modified SAP) starts with a thin copper foil typically 1.5-3μm thick—about ten times thicker than SAP’s seed. This makes mSAP more compatible with standard PCB manufacturing equipment while still achieving 15-30μm line/space capability, finer than subtractive but not as fine as true SAP.
How does SAP compare to traditional subtractive PCB process?
Traditional subtractive etching begins with thick copper foil (18-35μm) and removes unwanted copper through chemical etching. This creates trapezoidal trace cross-sections due to isotropic undercut, limiting minimum line/space to approximately 25-30μm. SAP builds traces up from a seed layer rather than removing material, producing near-vertical sidewalls and enabling sub-15μm features. SAP also provides better impedance control and signal integrity due to its rectangular trace profile.
What are the main applications of SAP PCB technology?
SAP is essential for IC packaging substrates, advanced packaging technologies (2.5D/3D interposers, fan-out WLPs), AI and high-performance computing hardware requiring ultra-dense interconnections, RF and microwave circuits benefiting from superior impedance control, and medical devices requiring miniaturization. The technology serves applications where feature sizes approach semiconductor-level densities.
What trace widths can SAP achieve compared to other processes?
Different fabrication processes achieve different minimum feature sizes. Traditional subtractive etching reaches approximately 25-30μm line/space due to etch undercut. mSAP achieves 15-30μm, with production commonly targeting around 20μm. True SAP goes below 15μm, with advanced implementations reaching 5-10μm. Emerging aSAP (advanced SAP) technology demonstrates 3.5-5μm features for next-generation AI and HPC applications.
When should I choose SAP over standard HDI PCB manufacturing?
Choose SAP when your design requires trace widths below 15μm, needs IC substrate-level feature densities, demands superior signal integrity with tight impedance tolerances, or targets advanced packaging applications. Consider mSAP as a cost-effective middle ground when you need finer features than subtractive provides but don’t require true sub-15μm capability. For most conventional HDI applications with features above 30μm, standard subtractive or semi-subtractive processes remain more economical.
References
- Altium. “SAP (Semi-additive PCB process): The Basics.” Tara Dunn, October 2021.
https://resources.altium.com/p/sap-semi-additive-pcb-process-basics - AT&S. “mSAP Technology.”
https://ats.net/en/technologies/msap/ - PCBSync. “Additive PCB Manufacturing: SAP & mSAP Process.”
https://pcbsync.com/additive-pcb-manufacturing/ - PCB Directory. “Innovative Semi-Additive Process Technology from GS Supports PCB Line Spacing Down to 10 Microns.” Spring 2024.
https://www.pcbdirectory.com/news/innovative-semi-additive-process-technology-from-gs-supports-pcb-line-spacing-down-to-10-microns
Further Reading
- Stacked vs Staggered Microvias | Understanding microvia technology for high-density interconnects
- Via in Pad Filled and Capped | Via density optimization techniques
- Blind vs Buried Vias | Via types and their applications in multilayer boards
- PCB Stackup Design | Planning layer stackups for optimal performance
- HDI PCB Cost | Understanding cost factors in HDI manufacturing
- 1+N+1 vs 2+N+2 HDI | Comparing HDI stackup configurations
Shanghai Huangte Technology Co., Ltd. | Last updated: 2026-07-31
The information provided in this article is for technical reference purposes. Specific manufacturing capabilities, tolerances, and pricing vary by fabricator. Consult with your PCB manufacturer early in the design phase to determine the most appropriate fabrication process for your application requirements.



